Founding fab-edge perception engineer
Metropolis, DeepStream, Holoscan, TensorRT on fab-edge GPUs and Jetson. Fuse optical, e-beam and SEM inspection streams into one defect classifier at tool cadence.
Waferira is pre-launch and building its founding team. The four roles below are the ones we expect to open first, written as honestly as we can about the stage: there is no office to show, no customer list, and the first job is a paid, IP-isolated pilot on one module.
Illustrative scenario: Module M2 · 300 mm · metal-1 · lot L-48213, one lot through metal-1, one approval gate
Role descriptions, not an openings count. Each is a founding role.
Metropolis, DeepStream, Holoscan, TensorRT on fab-edge GPUs and Jetson. Fuse optical, e-beam and SEM inspection streams into one defect classifier at tool cadence.
SECS/GEM, APC and FDC connectors on litho, etch, deposition and CMP tools. Bounded recipe writes, tool-state checks, rollback and the IP-isolated audit log.
Omniverse fab twin, physics-ML process surrogates, discrete-event flow simulation, cuOpt dispatch. Hit yield, uniformity and cycle time before the lot runs.
Someone who has owned a litho, etch or CMP module in a production fab. Translate process and yield craft into process windows, metrics and acceptance tests for design partners.
We measure ourselves on yield points, excursions, scrapped lots, review hours and cycle time, the fab's own numbers.
A design target is called a design target. A scenario is called a scenario. We do not round up.
Per-tenant isolation, the policy engine, approvals and the audit log are the product, not overhead.
A recipe move is rehearsed on the twin before it is written. So are our own changes.
Every decision, every run, every correction goes into a record someone else can read.
The craft we are encoding lives on the floor and in the review room. We go there, under the fab's rules.
Every Waferira run is an ordered, inspectable sequence. This is run_7b2e9c on Module M2 · 300 mm · metal-1 · lot L-48213. Scenario completes in 10 steps with one approval gate. Overlay and CD predicted inside spec, one reticle-repeater signature caught and held for review, dispatch re-optimised, lot released with full genealogy.
Fab Orchestrator · Pulled lot L-48213 from fab MES: 25 wafers, 300 mm, metal-1 layer, route, reticle, overlay and CD spec and the standing cycle-time target. Locked the target envelope for the run.
Fab Twin · Simulated 64 candidate correctable, recipe and dispatch sets on the as-run fab twin and ranked them on predicted overlay residual, CD uniformity, excursion risk and cycle time.
Litho-and-Overlay · Per-field overlay correctables and a focus-dose trim written to scanner SCN-07 over SECS/GEM after the previous lot's residual trended toward the control limit. Predicted overlay residual back inside spec.
Etch-and-Depo · Chamber B on etcher ETCH-12 showed an edge-fast uniformity drift in FDC. Pressure and RF trims written within the qualified recipe window; predicted CD uniformity recovered.
CMP-and-Implant · Downforce and platen-speed trim on CMP-03 against the virtual removal-rate estimate to hold post-CMP thickness and dishing inside the window.
Defect-and-Inspect · Inline optical, e-beam review and SEM imagery fused at the tool edge. 1,412 events classified, most dispositioned nuisance; one reticle-repeater signature on three dies flagged for review.
Metrology-and-Virtual · Virtual metrology scored every wafer at post-etch and post-CMP from tool-sensor and FDC signatures. Two wafers routed to physical metrology on predicted variance; the rest sampled at plan.
Fab Orchestrator · The reticle-repeater signature called for a reticle inspection hold and a recipe move outside the qualified window. Held for the module process engineer and approved at 03:14:27.
Yield-and-Dispatch · Dispatch re-optimised across 1,840 lots in WIP under reticle, chamber and qualification constraints. The lot routed to the qualified chamber with the shortest predicted queue; AMHS move issued to the stocker.
Quality-and-Conformance · Lot L-48213 moved on: genealogy written (recipe moves, correctables, FDC signatures, VM scores, defect map, approvals) and checked against the layer spec.
Computational lithography, defect classification on e-beam and SEM imagery, per-wafer virtual metrology and a full-fab twin are among the most compute-intensive workloads in manufacturing. Waferira keeps IP-sensitive inference and feature storage at the fab edge and runs training, simulation and optimisation on GPUs the fab controls.
Inline optical, e-beam and SEM imagery and sensor fusion on fab-edge GPUs. 10 to 50 inspection streams per pilot module and sub-200 ms priority defect triage are the design targets.
High-volume multivariate tool-sensor and FDC time-series scoring on every wafer, 1 to 5 seconds per lot-step in the design, with nightly retraining as recipes and chambers drift.
Defect, virtual-metrology and process-response models retrained per process family; 500 to 2,000 GPU-hours per family per quarter is the design target. Dedicated capacity is planned.
As-run process and flow simulation, 1,000 to 10,000 candidate recipe, metrology and dispatch scenarios per fab per day in the design. OVX access is planned.
Rare defect, particle, overlay-drift, CMP-dishing and film-uniformity variants generated and validated against real distributions before promotion. Planned.
Constrained WIP dispatch re-optimised every 1 to 5 minutes across reticle, chamber, route, tool-state and cycle-time constraints.
Local FOUP and robot perception and exception detection at the fab edge. Jetson Thor is planned for higher sensor density.
Tenant-isolated process Q&A and OCAP reasoning over recipes, SEMI procedures and audit logs, with citations enforced on every answer.
A fab does not go from manual APC to unattended control in one step. Waferira makes the level explicit, auditable and reversible at any time. The first release runs shadow mode, then assist mode, then graduated autonomy for low-risk APC, defect and metrology loops.
| Level | What the agent does | What the human does | Where it sits in a pilot |
|---|---|---|---|
| L1 · Advisory | Recommends recipe moves, dispositions and dispatch, with citations | Enters every change manually | Shadow mode, first on the design-partner cell |
| L2 · Supervised | Proposes a recipe write or hold; it executes on approval | Approves each move in the review console | Assist mode, where accuracy and ROI are proven |
| L3 · Bounded | Writes inside the qualified recipe window, tool-state checks and OCAP linkage | Approves holds, out-of-window moves and lot release | Graduated autonomy for low-risk APC, defect and metrology loops |
| L4 · Qualified loops | Runs a qualified loop without prompting, inside its envelope | Sets the envelope; reviews the shift record | Planned; reserved for loops the fab has qualified |
Waferira writes to production tools over SECS/GEM. Every capability is scoped to a qualified recipe window, every write is policy-checked against tool state, and every action is written to an append-only, IP-isolated audit log the fab owns.
| Item | Scope | Status |
|---|---|---|
| SOC 2 Type I and fab-security review | Control plane | QUEUED Planned, first 6 months |
| SOC 2 Type II | Control plane | QUEUED Planned, 6 to 12 months |
| SSO and RBAC | Console and approvals | QUEUED Planned, 6 to 12 months |
| IP-isolation and security assurance package | Fab security and IT and OT review | QUEUED Planned, 6 to 12 months |
| SEMI-standards-cited reasoning | Recipes, integration specs, OCAPs | RUNNING In the design, every answer cites its source |
| Per-tenant IP isolation | Data, models, memory | RUNNING In the design from day one |
| On-prem and fab-edge deployment | IP-sensitive fabs | RUNNING Design option |
The questions fab directors and process engineers ask in the first meeting.
Yes, over SECS/GEM, but only inside the qualified recipe window for that tool, with per-parameter limits and tool-state checks, and only at the autonomy level your fab has set. Level 1 is advisory: Waferira recommends and an engineer enters everything. Design partners start there, in shadow mode.
The tool stays on its own controller and its last qualified recipe. Waferira is a supervisory layer on top of the APC, inspection, metrology and MES systems you already run, never a replacement for them, so an outage leaves the module running the way it runs today.
No. Inference and feature storage stay at the fab edge, recipes, device designs, defect libraries and process memory are isolated per tenant, and an on-prem control plane is available for IP-sensitive fabs. Any cross-fab learning is planned, contract-gated and privacy-preserving, and none of it moves recipes or designs.
Advisory recommendations start from the existing APC, metrology and ADC data on the wedge module. Defect classification, virtual metrology and excursion prediction improve as labelled events and lot outcomes accumulate per process family. Rare excursions are augmented synthetically only after validation against real distributions.
You are, the same as with any APC strategy, which is why every write is policy-checked, bounded to the qualified window, logged and reversible, and why holds, out-of-window moves and lot release wait for a named approver with the OCAP linked.
A paid pilot on one process module or tool fleet, scoped to one wedge workflow with a baseline agreed in writing. Shadow mode first, observing and measuring the baseline. Then assist mode, where the agent recommends and your engineer approves and accuracy and ROI are measured. Then bounded autonomy for low-risk APC, defect or metrology loops if the fab is satisfied.
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